Embedded systems and electronics engineering

When to call

Four situations

• New product development

  You have the product idea and the market, but not the team to turn it into electronics, firmware and a device designed for certification and production. We take it from concept to a product that can be built and serviced, and we can start before your own team exists.

• Modernization & migration

  A part goes end-of-life, the MCU is unobtainable, or the design is fifteen years old and nobody dares to touch it. We move hardware, FPGA and firmware to current components, and leave a structure that the next change will not break.

• Bring-up & stabilization

  A new board or first silicon does not behave, the fault sits between hardware, FPGA and firmware, a prototype works but is not stable, or a deadline is close. We find the fault and get the system stable.

• Performance & timing

  A critical path does not meet its throughput or latency target, and nobody knows where the time goes. We measure, find the bottleneck and fix it at the right level: algorithm, code, DMA or hardware.

Services

Three core areas

• System Architecture, Firmware & FPGA

  Full stack in the literal sense: analog front end, FPGA, firmware, touch GUI and web interface from a single source. We know where each function belongs, and we take on the parts that are still hard: a GUI that stays responsive under streaming data, a firmware architecture that survives the next MCU change, and performance optimization down to cache, DMA and SIMD when a data path has to be fast.

  • STM32
  • ARM Cortex-M
  • ARM Cortex-A
  • NEON
  • Xilinx
  • Lattice
  • PCIe
  • EtherCAT
  • TSN
  • OTA
  • HMI
  • HIL testing

• Analog, Mixed-Signal & EMC-Robust Hardware

  Two ends of one discipline: industrial power electronics with galvanic isolation, high currents and real loads, and precision front ends that measure down to nanoamps. EMC and product safety are designed in from the first layout. And when a product fails certification, we are the ones called to find the cause and fix it.

  • Industrial electronics
  • Power electronics
  • PCB design
  • EMC
  • IEC 61326
  • IEC 61010
  • IEC 60601-1

• Safety & Security Architecture

  Safety and security are architecture, not a phase at the end. We keep systems small enough to assess: few dependencies, a short SBOM, and for each safety mechanism the leanest solution that does the job, in hardware or in software. Twenty-five years of combined safety experience, from radar ICs at ASIL C to life-supporting medical devices, including the root-cause analysis when a device has failed in the field. We build systems that can be assessed.

  • Functional safety
  • ISO 26262
  • IEC 61508
  • SIL
  • DO-254
  • IEC 62304
  • ISO 14971
  • MISRA
  • IEC 62443
  • Cyber Resilience Act

How we work

Principals, platform, milestones

• Two principals, direct decisions

  You work directly with the engineers doing the work: no handoff to a delivery team, no account-manager layer. Principal-level work, principal-level ownership, across hardware, FPGA, firmware and test.

• Platform, faster to a working product

  Your project starts from a running system, not from a blank page. The infrastructure every device needs already exists and runs on the digital platform of our own instrument, so the budget goes into what makes your product different, not into rebuilding what already works. Our own product depends on the same platform, which gives us a permanent reason to keep it excellent. Where your product needs something specific, we build it.

• AI-augmented, engineer-controlled

  You get more for the same budget: higher test coverage, more thorough reviews and more documentation than two people could write by hand. Decisions stay with people. We define the architecture and review the critical code ourselves.

• Few projects, full attention

  We accept only a limited number of client projects next to our own product line, and we plan the capacity for the whole project before we start.

• Short milestones, visible results

  You see progress, not status reports. Every milestone ends with a demo of a running system, agreed with you in advance, so you can correct early instead of late. Nothing appears for the first time at the end of the project.

• Your code, no black boxes

  No lock-in, by design. Development runs in a repository you can read from the first day, client-specific code is yours, platform components come as source, and documentation and automated tests are part of every delivery.

Reference

Our own instrument

The LPS3010 is a single-channel laboratory power supply and electronic load: 240 W source and sink, 6½-digit measurement, 1 MSa/s acquisition and 100 kSa/s waveform generation. In 18 months, two engineers built the digital platform, designed the power stage and simulated the precision analog design end to end.

Analog

In-house converter for the 6½-digit readback, fast acquisition path, two-quadrant output with 0.2 mV RMS noise and 30 µs transient recovery as design targets.

Platform

STM32N6 with a Lattice MachXO2 per isolated channel, FPGA logic in VHDL, C/C++ firmware on ThreadX RTOS, hardware abstraction layer with board support for Microchip SAM E70, ST STM32U5 and STM32N6.

Boot & update

Secure boot with SHA-256 hash and ECDSA P-256 signature check, first GUI frame under 250 ms. AES-256-GCM encrypted, signed A/B updates with rollback, in-system FPGA update, USB DFU recovery.

Robustness

Watchdog with fault context, MPU and stack-limit protection, persistent log, WCET profiler. FPGA communication watchdog, over-temperature guard, hardware brown-out reset.

Connectivity

SCPI over USB and Ethernet with mDNS discovery, 25 MB/s over USB-TMC at 125 µs latency, 37 MB/s over HiSLIP, USB mass storage at 20 MB/s write and 30 MB/s read, RTC synchronized by IEEE 1588 PTP.

HMI

LVGL touch GUI, embedded web server with HTML5 interface over WebSockets, screenshots as JPEG over SCPI.

Verification

Over 3,000 GoogleTest unit tests and 50 hardware-in-the-loop tests in Python (pytest, PyVISA).

• LPS3010 instrument page
• SCPI command reference (PDF, documentation example)

Principals

The people who do the work

• Georg Schiller

  Managing Director · System architecture, firmware, FPGA, functional safety

  Georg brings nearly two decades of embedded systems and HW/SW integration at Infineon and Bosch: firmware architecture for automotive radar SoCs, first-silicon bring-up, and software safety mechanisms up to ASIL C. He built a firmware organization from two people to around 25 engineers, turned the ASPICE process into daily practice on the way to Level 2, and is co-inventor on four granted patents (as Georg Krebelder).

• Udo Krebelder

  Managing Director · Analog and mixed-signal hardware, EMC, product safety

  Udo brings nearly three decades of electronics development. At MED-EL he led the hardware development for an implantable medical device. Independent since 2010, he has brought a heart-lung machine up to IEC 60601-1, developed avionics hardware under DO-254 and taken series products through EMC testing and UL approval.

Full CVs on request.